Semiconductor eFuses in general are known. The word fuse or eFuse will be used interchangeably in this specification. Specifically, eFuse in this application refers to fuses that increase the resistance of a circuit path when subjected to a programming current.
However, known eFuses have not proven to be entirely satisfactory. Programming in, for example, silicon-based semiconductor devices (e.g., fuses) can result in post collateral damage of neighboring structures. This result typically forces a fuse pitch, or fuse cavity, set of rules that do not scale well with the technology feature rules from one generation to the next. Thus, fuse density and effectiveness of fuse repair, replacement, or customization are limited. Typically, such damage is caused by particulates from fuse blow. Another class of fuses having a high resistance from an unprogrammed state change to a programmed state having a low resistance, is known as “antifuse”. See, for example, U.S. Pat. No. 5,334,880, Low Voltage Programmable Storage Element, by Abadeer, et al., which is incorporated here in its entirety.
Semiconductor chips typically have many fuses depending on the particular device; the number of fuses can range from tens to thousands. Such fuses contain an initial resistance distribution of R0±ΔR0, and a programmed resistance distribution of Rp±ΔRp. The ±ΔRp causes fuse read instability because this parameter is statistical in nature. The variations that cause the R0 and Rp distributions to approach each other cause practical limitations in interrogating a programmed fuse through a standard CMOS latching circuit. To overcome these limitations, the prior art has included (for example) additional fuses as reference elements in order to discriminate between a programmed and an unprogrammed fuse. Such practices result in unwanted growth in the fuse bank area.